/**
	*****************************************************************************
	* @file     cmem7_wdg.c
	*
	* @brief    CMEM7 watchdog source file
	*
	*
	* @version  V1.0
	* @date     3. September 2013
	*
	* @note               
	*           
	*****************************************************************************
	* @attention
	*
	* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
	* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
	* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 
	* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
	* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
	* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
	*
	* <h2><center>&copy; COPYRIGHT 2013 Capital-micro </center></h2>
	*****************************************************************************
	*/
	
#include "cmem7_wdg.h"

/**
  * @brief  Deinitializes the WWDG peripheral registers to their default reset values.
  * @param  None
  * @retval None
  */
void WDG_Init(uint8_t trigger, uint16_t ResetMicroSecond) {
	assert_param(IS_WDG_TRIGGER_MODE(trigger));
	
	WDG->INT_CTRL_b.TRIGGER_MODE = trigger;
	WDG->LEN = ((uint64_t)SYSTEM_CLOCK_FREQ) * ResetMicroSecond / 1000;
}

void WDG_EnableInt(uint8_t Int, BOOL Enable) {
	assert_param(IS_WDG_INT(Int));
	
	WDG->CTRL_b.INT_LEN = Int;
	WDG->INT_CTRL_b.MASK = !Enable;
}

BOOL WDG_GetIntStatus() {
	return (WDG->INT_STA_b.STA == 1) ? TRUE : FALSE;
}

void WDG_ClearInt() {
	WDG->INT_STA_b.STA = 1;
}

void WDG_Enable(BOOL Enable) {
	WDG->CTRL_b.EN = Enable;
}

